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Savar Andrew Phillips Fall Semester 2005 1/8/07 The University of Toledo EECS:4610/5610/7610 Digital VLSI Design I Dr. A.D. Johnson templ mpha.fm - 2 Chapter 1. Behavioral Description 1.1 Introduction The main purpose of our project is to design a sixteen to one multiplexer, where a four-bit address selects one of sixteen input signals to a single output signal. An enable signal is used to specify the status of the MUX (Multiplexer) as either enabled or disabled. To implement our project w.

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